Tektronix provides flexible and accurate jitter measurement to precisely define Tj @ BER and break down Tj into its components for greater insight. ... Tektronix provides flexible, yet accurate jitter measurement and noise analysis on it's oscilloscopes that precisely define Tj @ BER and break down Tj into it's components (Rj,
www.tek.com/applications/serial_data/jitter.html www.tek.com/applications/serial_data/jitter.html
If the duration of the data is sufficiently long, the resulting jitter measurement may include wander as well as jitter. In this case, a high-pass filter may be used subsequently to remove the wander component.
www.tek.com/Measurement/scopes/jitter/55W_16146_1.pdf www.tek.com/Measurement/scopes/jitter/55W_16146_1.pdf
Brief16 (PDF File)
Ideal Cycle t3 Clock Jitter Figure 3. Period Jitter Ideal Clock Clock with Jitter Data Set-Up Time Figure 4. Application for Period Jitter Measurement One method of measuring period jitter requires a storage oscilloscope.
www.pericom.com/pdf/applications/AB036.pdf
Time Domain Jitter Measurement ... The concerns are that this technique is susceptible to trigger jitter, can be unreliable or misleading for accumulated jitter measurement, and lack statistical information that describe jitter characteristics. More accurate measuring methods have been employed.
www.maxim-ic.com/app-notes/index.mvp/id/2744
Jitter - Wikipedia, the free encyclopedia
Jitter is the time variation of a periodic signal in electronics and telecommunications, often in relation to a reference clock source. Jitter may be observed in characteristics such as the frequency...
en.wikipedia.org/wiki/Jitter
In this paper, we present an infrastructure IP core to facilitate on-chip clock jitter measurement. In the proposed approach, the clock signal under test is delayed by two different delay values and the probabilities it leads the two delayed versions are measured. ... San Jose, CA ... October 11-October 13...
csdl.computer.org/comp/proceedings/iccd/2004/2231/00/22... csdl.computer.org/comp/proceedings/iccd/2004/2231/00/22310186abs.htm
Henry C. Lin, Karen Taylor, Alan Chong, Eddie Chan, Mani Soma, Hosam Haggag, Jeff Huard, Jim Braatz, "CMOS Built-In Test Architecture for High-Speed Jitter Measurement," Test Conference, International, pp. 67, International Test Conference 2003 (ITC'03), 2003.
csdl.computer.org/comp/proceedings/itc/2003/2063/00/206... csdl.computer.org/comp/proceedings/itc/2003/2063/00/20630067abs.htm
GL's Jitter Measurement module (additional licenses required) allows evaluation of jitter on either a tick-by-tick or a cumulative basis. ... Download Jitter Measurement Brochure...
www.gl.com/jitter-measurement.html www.gl.com/jitter-measurement.html
Karen Taylor, Bryan Nelson, Alan Chong, Hieu Nguyen, Henry Lin, Mani Soma, Hosam Haggag, Jeff Huard, Jim Braatz, "Experimental Results for High-Speed Jitter Measurement Technique," Test Conference, International, pp. 85-94, International Test Conference 2004 (ITC'04), 2004.
doi.ieeecomputersociety.org/10.1109/ITC.2004.73
Among many recently proposed on-chip jitter measurement designs, vernier delay line (VDL) is one of the most widely adopted methods that can achieve fine resolution. However, there are two major design challenges: the first is the mismatching of delay buffers; ... IEEE Computer Society Annual Symposium on VLSI: ... May 11-May 12...
doi.ieeecomputersociety.org/10.1109/ISVLSI.2005.66
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