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Patent application title: METHOD OF FABRICATING AN INTEGRATED CIRCUIT ... Trench capacitors, such as the trench capacitor 59, are concepts of the technology of manufacturing integrated circuits. Particularly, ... 2A illustrates a functional layer being formed on a substrate 100 during a first stage of fabrication.
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www.faqs.org/patents/app/20080282535
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Back in 1996, there were not that many institutions that provided a fabrication facility to an undergrad. This lab was on the physical theory, design and fabrication of devices suitable for integrated circuitry;
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www.estss.com/NCS/PROJECTS/344_ICfab/
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Integrated circuit - Wikipedia, the free encyclopedia
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In electronics, an integrated circuit (also known as IC , microcircuit , microchip , silicon chip , or chip ) is a miniaturized electronic circuit (consisting mainly of semiconductor devic...
en.wikipedia.org/wiki/Integrated_circuit
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A circuit fabrication and lithography process utilizes a mask including dense repetitive structures of features that result in a wide array of fine densely populated features on the exposed substrate film. ... 5858580 Phase shifting circuit manufacture method and apparatus Wang et al. 430/5...
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freepatentsonline.com/6818389.html
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6319809 Method to reduce via poison in low-k Cu dual damascene by UV-treatment Chang et al. 438/597 ... In the production of microelectronic devices, the levels of multilevel wiring structures have interconnecting regions for interconnecting one or more devices within overall integrated circuits.
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freepatentsonline.com/6383912.html
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Method and apparatus are disclosed for making integrated optical circuits. A waveguide in the form of a thin layer of dielectric material is modified as to its coherent radiation transmitting properties by electron beam impingement thereon so as to modulate coherent radiation by mode conversion and mode guiding.
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www.patentgenius.com/patent/4085501.html
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The present invention provides a method of integrating the fabrication processes common to MEM devices and integrated circuits. FIGS. 1A to 1E are cross-sectional views of a fabrication process in accordance with one embodiment of the presentinvention.
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www.patentgenius.com/patent/6797534.html
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As feature sizes in the production of integrated circuits approach 0.25 μm and below, problems of packing density become increasingly difficult to overcome. The formation of borderless vias is one method to reduce metal pitch in and packing density of integrated circuits.
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www.freepatentsonline.com/6097095.html
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Integrated circuit leadframe and fabrication method therefor ... Modem electronics, such as smart phones, personal digital assistants, location based services devices, servers, and storage arrays, are packing more integrated circuits into an ever shrinking physical space with expectations for decreasing cost.
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www.freepatentsonline.com/7556987.html
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