Hardware transactional memory systems may have modifications in processors, cache and bus protocol to support transactions. Software transactional memory
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en.wikipedia.org/wiki/Transactional_memory
en.wikipedia.org/wiki/Transactional_memory
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# Software Transactional Memory III - Making Transactions Atomic - Ralf's Sudelb??cher Thursday, July 05, 2007 9:55 AM by Software Transactional Memory III - Making Transactions Atomic - Ralf's Sudelb??cher...
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weblogs.asp.net/ralfw/archive/2007/07/05/software-trans...
weblogs.asp.net/ralfw/archive/2007/07/05/software-transactional-memory-iii-making-transactions-atomic.aspx
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# Software Transactional Memory IV - Thread-Bound Transactions - Ralf's Sudelb??cher Friday, July 06, 2007 4:04 PM by Software Transactional Memory IV - Thread-Bound Transactions - Ralf's Sudelb??cher...
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weblogs.asp.net/ralfw/archive/2007/07/06/software-trans...
weblogs.asp.net/ralfw/archive/2007/07/06/software-transactional-memory-iv-thread-bound-transactions.aspx
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By contrast, software transactional memory provides synchroni- sation without persistence. Because the state manipulated by mem- ory transactions is not...
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research.microsoft.com/en-us/um/people/simonpj/Papers/S...
research.microsoft.com/en-us/um/people/simonpj/Papers/STM/stm.pdf
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[June 2005] Composable memory transactions (PPOPP'05) The limits of software transactional memory (STM): dissecting Haskell STM applications on a many-core environment, Cristian Perfumo, 2008 conference on Computing frontiers, pp67-78.
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research.microsoft.com/en-us/um/people/simonpj/papers/s...
research.microsoft.com/en-us/um/people/simonpj/papers/stm/index.htm
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We implement xCalls for the Intel Software Transactional; Memory compiler, and found it straightforward to convert programs to use transactions and xCalls. In tests on a 16-core; NUMA machine, we show that xCalls enable concurrent I/O and system calls within transactions.
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www.cs.wisc.edu/multifacet/papers/eurosys09_xCalls.pdf
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D. Chaiken , A. Agarwal, Software-extended coherent shared memory: IEEE Transactions on Parallel and Distributed Systems, v.3 n.5, p.525-539,
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portal.acm.org/citation.cfm?id=143540
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with OS virtual memory transaction management. Additional OS software must save and restore the access and update bit vectors at each task switch...
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eprints.kfupm.edu.sa/75647/1/75647.pdf
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The use of two-phase locking (2PL) to enforce serialization in today’s Software Transactional Memory (STM) systems leads to poor performance for programs with long-running transactions and considerable data sharing.
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www.unine.ch/transact08/papers/Aydonat-Serializability....
www.unine.ch/transact08/papers/Aydonat-Serializability.pdf
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