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Burst SRAM is used as the external L1 and L2 memory for the Pentium microprocessor chipset. Burst SRAM (also known as SynchBurst SRAM ) is synchronized with the system clock or, in some cases, the cache bus clock.
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3.3V 128K x 36 Synchronous PipeLined Burst SRAM with 2.5V I/O. 25 documents ... 3.3V 256K x 18 Synchronous PipeLined Burst SRAM w/3.3V I/O. 25 documents ...
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FaStack® 3D Memory -- Synchronous Burst SRAM; (obsolete) ... Burst control pin (interleaved or linear burst) ... Press: Tezzaron Unveils 3D SRAM; Tezzaron Announces Commercial 3D ICs...
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Free Online Library: Cypress Samples Industry's Highest-Density Burst SRAM; 72-Mbit NoBL Products Offer Greater Density and Lower Power For Switches and Routers at OC-48 Speeds and Above. by "Business Wire"; Business, international Semiconductor industry ... SRAM - static random-access memory...
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pipelined burst SRAM using a 6.156- m. 2 cell. It realizes over. 500-MHz operation using a lower cost double metal process. Internal 16 K ...
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This site describes and illustrates how Burst SRAM appears under a microscope.
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Croatian-English translation for (comp) Burst SRAM - online dictionary EUdict.com.
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What is Pipeline Burst SRAM? ... Pipeline Burst SRAM (PB SRAM) is a type of SRAM that can support Pentium-based system boards. PB SRAM on average outperforms systems using standard SRAM on average of 7.5% and by up to 15%-16% when using applications in Windows®.
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; Product Locator >> Semiconductors >> Memory >> DRAM, SRAM aand other RAM;
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The 72-Mbit NoBL burst SRAM products are organized in 2 Mb x 36, operate at up to 166 MHz clock speed and deliver 100 percent bus utilization during four-word read/write/read transactions. The products are available with 2.5 V or 3.3 V power supply options in a 100-pin TQFP package.
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